In computing operations, multi-bank register files are common structures for computation data storage, such as in execution units (EUs) for graphical processing units (GPUs). The multi-bank structures generally include a number of banks of registers that are clubbed together, with the ports shared for reduced area requirements.
The register banks of a multi-bank structure are commonly each coupled with an element to select a register bank for reading, such as a register file read multiplexer. In this manner, it is possible to read multiple registers, one register per port, in the same clock cycle as long as registers all belong to different banks.
However, reading two or more registers that belong to the same bank in a same clock cycle results in a register bank conflict that thus serializes the read requests and potentially causes delays in the pipeline. In GPUs, the majority of register bank conflicts result from thread internal conflicts, thus resulting in decreased efficiency in the processing of the multiple threads for the GPU execution units.